The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component or line that can be created using a fabrication process) has decreased. In the past few decades, the number of transistors per chip area has approximately doubled every two years. In the meantime, the pitch of metal interconnections between IC components (referred to as metal pitch) has also become approximately 30% smaller for matching the smaller sized transistors. Although multiple patterning lithography is theoretically capable of achieving this smaller metal pitch, cost increases and overlay issues between the successive exposures may be obstacles for mass production.
Extreme ultraviolet (EUV) lithography or other advanced lithography techniques may be used to achieve smaller metal pitch. Compared to other light sources commonly used for photolithography, EUV employs a shorter wavelength which can provide higher resolution and better critical dimension uniformity (CDU). EUV lithography may, for example, be used for patterning very small semiconductor technology nodes, such as 14-nm, and beyond. EUV lithography is very similar to optical lithography in that it needs a mask to print wafers, except that it employs light in the EUV region, e.g., at about 13.5 nm. At the wavelength of 13.5 nm, most materials are highly absorbing. Thus, reflective optics, rather than refractive optics, are commonly used in EUV lithography. EUV lithography may be cost effective by reducing the photomask usage from multiple patterning to single or double patterning.
EUV lithography may, for example, be used to pattern one dimensional (1D) and two dimensional (2D) metal connections. A one-dimensional metal connection process provides two metal layers for X-Y routing. That is, one layer includes parallel metal lines extending in a first direction (e.g., vertical lines), and another layer includes parallel metal lines extending in a second perpendicular direction (e.g., horizontal lines). The desired metal interconnections are then provided by adding inter-layer connections (e.g., metalized vias) at certain intersections of the perpendicular metal lines. The resulting metal connections are one-dimensional in the sense that each of the metal layers is patterned in only a single direction (e.g., horizontally or vertically). One-dimensional metal connections may be advantageous for certain applications because the process utilizes a simple pattern and provides a small cell area. However, the need for two metal layers may be undesirable in some applications.
A two-dimensional metal connection process provides X-Y routing on a single metal layer. That is, two-dimensional metal shapes are patterned on a single semiconductor layer using EUV or other advanced lithography photolithography techniques to provide the desired metal connections, for example using a double or triple patterning process. The use of two-dimensional metal shapes enables inter-layer connections (e.g., metalized vias) to be more easily placed at any desired location compared to a one-dimensional connection process. However, although this two-dimensional EUV metal connection process advantageously provides metal interconnections on a single semiconductor layer, each of the two-dimensional metal shapes needs to be patterned separately. As a result, there may be limitations on the achievable connector density, along with other potential disadvantages such as a large cell area and a large amount of required mask space.